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1 www.pericom.com 12/03/15 features ?? 4-lane, 1:2 mux/demux that will support rbr, hbr1, or hbr2 ?? data rate: 3.4 gbps to 6.0 gbps for high data channels ?? 1-channel 1:2 mux/demux for hpd signal ?? diferential switch matrix for dp aux and hdmi ddc ?? supports 720 mbps high-speed dp aux ?? -2.0 db insertion loss for dx channels @ 3 ghz ?? -3 db bandwidth for dx channels: 4.1 ghz ?? return loss for dx channels @ 3 ghz: -12 db ?? low crosstalk for high speed channels: -25 db@ 6 gbps ?? low of isolation for high speed channels: -24db@ 6 gbps ?? low channel-to-channel skew, 35ps max ?? low bit-to-bit skew, 5ps typ (between '+' and '-' bits) ?? v dd operating range: 3.3v +/-10% ?? esd tolerance: 2kv hbm ?? packaging (pb-free & green): -50-ball tfbga (nee) -52-pin tqfn (zl52) description pericom semiconductors PI3WVR12612 is a multi-standard video switch with wide voltage range capability. it supports displayport 1.2, hdmi 2.0, and emerging and proprietary standards. PI3WVR12612 can pass high-speed signals up to 1.2 v peak- to-peak diferential with a common-mode voltage from 0 to 3.4v. te wide voltage range allows dc-coupled multi-standard operation. eliminating ac coupling capacitors saves board space and improves signal integrity for dense pcb designs. te high speed channels can also pass 0v-3.3v cmos signals up to 1mhz. in addition to four high-speed lanes, PI3WVR12612 also switch - es aux, ddc, and hpd signals. application routing of displayport and hdmi signals with low signal at- tenuation between source and sink. block diagram pi3w vr12612 hdmi 2.0, displayport 1.2 video switch logic control d0+a d0+ d0-a d0- d1+a d1+ d1-a d1- d2+a d2+ d0-a d2- d3+a d3+ d3-a d3- d0+b d0-b d1+b d1-b d2+b d2-b d3+b d3-b ddc_aux_sel gpu_sel oe aux+a aux+ aux+b scl_a scl_b scl aux-a aux- aux-b sda_a sda_b sda hpd hpd a hpd b all trademarks are property of their respective owners. 15-0175
2 www.pericom.com 12/03/15 pin assignment (50-ball tfbga, nee) 1 2 3 4 5 6 7 8 9 d0- vdd d0+ gnd d1+ d2+ d3+ gnd aux+ ddc_ aux_ sel d1- d2- d3- hpd hpd_a vdd gnd hpd_b scl_b sda_b scl_a sda_a aux+a aux-a aux+b gnd aux-b aux- gpu _sel d3-a d1-b d2-b d2+b d3-b gnd gnd d1+b d3+b d3+a d0-b d0+b d0-a d0+a d1-a d1+a d2-a d2+a oe a b c d e f g h j gpu_sel scl sda control switch function oe gpu_ sel ddc_ aux_ sel d0- d3 aux hpd ddc high low low a aux a hpd a hi-z high high low b aux b hpd b hi-z high low high a ddc a hpd a hi-z high high high b ddc b hpd b hi-z high low medium a aux a hpd a ddc a high high medium b aux b hpd b ddc b low x x hi-z hi-z hi-z hi-z truth table ?? medium level = 1/2 vdd = 1.65v 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 52 51 50 49 48 22 23 24 25 26 oe d2-a d2+a d3-a d3+a v dd d0-b d0+b d1-b d1+b gnd d2-b d2+b d3-b d3+b sda_a scl_a gnd aux-a aux+a gnd v dd gnd gpu_sel d0- d0+ ddc_aux_sel d1- d1+ d2- d2+ d3- d3+ gnd v dd aux- aux+ hpd_b hpd_a hpd scl sda sda_b scl_b aux-b aux+b v dd d0-a d0+a d1-a d1+a gnd pin assignment (52-pin tqfn, zl52) pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
3 www.pericom.com 12/03/15 (continued) pin# pin name signal type description a1 gpu_sel i switch logic control b1 d0- i/o negative diferential signal 0 for com port b2 d0+ i/o positive diferential signal 0 for com port d1 d1- i/o negative diferential signal 1 for com port d2 d1+ i/o positive diferential signal 1 for com port e1 d2- i/o negative diferential signal 2 for com port e2 d2+ i/o positive diferential signal 2 for com port f1 d3- i/o negative diferential signal 3 for com port f2 d3+ i/o positive diferential signal 3 for com port b3 gnd ground ground h1 aux- i/o negative diferential signal for aux com port h2 aux+ i/o posititve diferential signal for aux com port j1 hpd i/o hpd for com port j2 hpd_a i/o hpd for port a h3 hpd_b i/o hpd for port b c8 gnd ground ground j4 vdd pwr 3.3v +/-10% power supply g2 gnd ground ground h6 aux+b i/o positive diferential signal for aux, port b j6 aux-b i/o negative diferential signal for aux, port b h9 aux+a i/o positive diferential signal for aux, port a j9 aux-a i/o negative diferential signal for aux, port a g8 gnd ground ground f8 d3+b i/o positive diferential signal 3 for portb f9 d3-b i/o negative diferential signal 3 for portb e8 d2+b i/o positive diferential signal 2 for portb e9 d2-b i/o negative diferential signal 2 for portb d8 d1+b i/o positive diferential signal 1 for portb d9 d1-b i/o negative diferential signal 1 for portb b8 d0+b i/o positive diferential signal 0 for portb b9 d0-b i/o negative diferential signal 0 for portb pin description pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
4 www.pericom.com 12/03/15 pin# pin name signal type description a8 d3+a i/o positive diferential signal 3 for port a a9 d3-a i/o negative diferential signal 3 for port a h4 gnd ground b6 d2+a i/o positive diferential signal 2 for port a a6 d2-a i/o negative diferential signal 2 for port a b5 d1+a i/o positive diferential signal 1 for port a a5 d1-a i/o negative diferential signal 1 for port a b4 d0+a i/o positive diferential signal 0 for port a a4 d0-a i/o negative diferential signal 0 for port a a2 vdd pwr power c2 ddc_ aux_sel i switch logic control h5 scl_b i/o ddc_clock channel for port b h7 gnd ground h8 scl_a i/o ddc_clock channel for port a j5 sda_b i/o ddc_data channel for port b j8 sda_a i/o ddc_data channel for port a j3 scl i/o ddc_clock channel for com port j7 sda i/o ddc_data channel for com port b7 oe i output enable. if oe is high, ic is enabled. if oe is low, then ic is power down and all i/os are hi-z pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
5 www.pericom.com 12/03/15 storage temperature .......................................................... C65c t o +150c supply voltage to ground potential ....................................C0.5v to +4.2v dc input voltage ...................................................................... C0.5v to v dd high speed data channel ....................................................... C0.5v t o 3.8v hpd_x, sda_x, scl_x ............................................................ -0.5v to 5.5v dc output current ............................................................................. 120ma power dissipation ................................................................................... 0.5w note: stresses greater than those listed under maxi - mum ratings may cause permanent damage to the device. tis is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. exposure to absolute maximum rating co ndi - tions for extended periods may afect reliability. maximum ratings (above which useful life may be impaired. for user guidelines, not tested.) dc electrical characteristics for switching over operating range (t a = C40c to +105c, v dd = 3 . 3 v 10 % ) parameter description test conditions (1) min ty p (2) max units v ih input high voltage (oe, gpu_sel) guaranteed high level 1.5 v v il input low voltage (oe, gpu_sel) guaranteed low level 0.75 v ih input high voltage (ddc_aux_sel) guaranteed high level 2.65 v dd v im input mid-level voltage (ddc_aux_ sel) guaranteed mid level v dd /2- 30 0mv v dd /2 v dd /2+ 30 0mv v il input low voltage (ddc_aux_sel) guaranteed low level -0.5 0.6 v ik clamp diode voltage (hs channel) v dd = max., i in = C18ma C1.6v C1.8 v ik clamp diode voltage (aux, cntrl ) v dd = max., i in = C18ma C0.7 C1.5 i ih input high current (all control pins) v dd = max., v in = v dd 5 a i il input low current (all control pins) v dd = max., v in = gnd 5 i off_sb i/o leakage when part is of for sideband signals only (ddc, aux, hpd) v dd = 0v, v input = 0v to 3.6v 20 r on_hs on resistance between input to output for high speed signals v input,cm = 0v to 3.4v, v input,dif < 1.2v p-p,dif , v dd = 3.0v, i input = 20ma 11 ohm r on_aux on resistance between input to output for side-band signals (aux) v dd = 3.0v, vinput = 0 to 3.3v, i input = 20ma 7 ohm r on_ddc on resistance between input to output for ddc channel v dd = 3.0v, vinput = 0v, i input = 20ma 12 ohm r on_hpd on resistance between input to output for hpd channel v dd = 3.0v, vinput = 0 to 3.0v, i input = 20ma 7 ohm v aux_ss signal swing tolerance in aux path v dd = 3.0v C0.5 5.5 v v hpd_i input voltage on hpd path 5.5 v v hpd_o output voltage tolerance on hpd path hpd input from 3.3v to 5.25v 3.3 3.6 v v sda_x input voltage on sda path 5 v v pass (sda_x) switch output voltage tolerance input v in = 5.25v, ii = 100ua, v dd = 3.3v 1.8 2.2 2.5 v v scl_x input voltage on scl path 5 v v pass (scl_x) switch output voltage tolerance input v in = 5.25v, ii = 100ua, v dd = 3.3v 1.8 2.2 2.5 v pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
6 www.pericom.com 12/03/15 dynamic electrical characteristics over operating range (t a = -40o to +105oc, v dd = 3.3v 10%) parameter description test conditions 1 min ty p 2 max units x talk crosstalk on high speed chan- nels see fig. 1 for measure- ment setup f= 3.0 ghz -25 -22 f= 2.7 ghz -28 -25 db f = 1.35 ghz -32 -28 o irr off isolation on high speed channels see fig. 2 for measure- ment setup, f= 3.0 ghz -24 -20 f= 2.7 ghz -25 -22 f = 1.35 ghz -30 -27 i loss diferential insertion loss on high speed channels @6.0gbps (see fgure 4) -2.3 -2.0 db @5.4gbps (see fgure 3) -2.0 -1.8 r loss diferential return loss on high speed channels @3.0ghz (6.0gbps) -12 -11 db @ 2.7ghz (5.4gbps) -14 -12.5 bw_dx bandwidth -3db for main high speed path (dx) see fgure 3 3.7 4.1 ghz bw_aux/ hpd -3db bw for aux, ddc, and hpd signals see fgure 3 1.35 1.5 ghz 1. f or max. or min. conditions, use appropriate value specifed under electrical characteristics for the applicable device type. 2. t ypical values are at v dd = 3.3v, t a = 25c ambient and maximum loading. switching characteristics (t a = -40o to +105oc, v dd = 3 . 3 v10 % ) parameter description min. ty p. max. units t pd propagation delay (input pin to output pin) on dx channels 80 ps t b-b bit-to-bit skew within the same diferential pair of dx channels 5 7 ps t ch-ch channel-to-channel skew of dx channels 35 ps tsw a-b time it takes to switch from port a to port b 0.1 us tsw b-a time it takes to switch from port b to port a 0.1 us tstartup vdd valid to channel enable 10 us twa keup enabling output by changing oe from low to high 10 us power supply characteristics (t a = C40c to +105c) parameter description test conditions (1) min ty p (2) max units i dd power supply current v dd = 3.3v, v in = gnd or v dd 1 3 ma i dd,of power supply current, disabled v dd = 3.3v, v in = gnd or v dd , v oe < v il 1 50 a 1. f or max. or min. conditions, use appropriate value specifed under electrical characteristics for the applicable device type. 2. t ypical values are at v dd = 3.3v, t a = 25c ambient and maximum loading. pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
7 www.pericom.com 12/03/15 fig 1. crosstalk setup fig 2. of-isolation setup + ? + ? balanced port1 dut + ? 50 50 + ? balanced port2 50 50 + ? + ? balanced port1 balanced port2 dut + ? 50 50 + ? + ? balanced port1 balanced port2 dut fig 3. diferential insertion loss test circuit or dynamic electrical characteristics pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
8 www.pericom.com 12/03/15 fig 4. crosstalk fig 5. of isolation pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
9 www.pericom.com 12/03/15 fig 6. insertion loss fig 7. tdr channel d0, vdd= 3.0v, 25c pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
10 www.pericom.com 12/03/15 fig 8. diferential output eye at input signal is a 2 7 -1 prbs, vdd=3.0v, 25c, input swing is 800mv diferential fig 9. diferential output eye at input signal is a 2 7 -1 prbs, vdd=3.0v, 25c, input swing is 800mv diferential pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
11 www.pericom.com 12/03/15 4pf c l v dd 200-ohm pulse generator d.u.t sel pa pb com 0v/3v 3v/0v test circuit for electrical characteristics(1-5) notes: 1. c l = load capacitance: includes jig and probe capacitance. 2. r t = termination resistance: should be equal to z out of the pulse generator 3. a ll input impulses are supplied by generators having the following characteristics: prr mhz, z o = 50?, t r 2.5ns, t f 2.5ns. 4. t e outputs are measured one at a time with one transition per measurement. switching waveforms voltage waveforms enable and disable times test condition output 1 test conditon output 2 test conditon pa = low pa = high pb = high pb = low tsw a-b 50% 50% v dd v oh 0v v ol t sw b-a output 1 output 2 v ol v oh sel 50% 50% pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
12 www.pericom.com 12/03/15 date: 04/04/13 description: 50-ball, thin fine pitch ball grid array, (tfbga) package code: ne50 document control #: pd - 2158 revision: - notes: 1. controlling dimensions in millimeters 2. ref: jedec mo-195c 13-0150 packaging mechanical: 50-ball tfbga (ne50) pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175
13 www.pericom.com 12/03/15 note: for latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php ordering information ordering code package code package description PI3WVR12612nee ne 50-pin, tin fine pitch ball grid array (tfbga) PI3WVR12612neex ne 50-pin, tin fine pitch ball grid array (tfbga), tape & reel PI3WVR12612zle zl 52-pin, 3.5 x 9.0 mm (tqfn) PI3WVR12612zlex zl 52-pin, 3.5 x 9.0 mm (tqfn), tape & reel notes: ? termal characteristics can be found on the company web site at www.pericom.com/packaging/ ? "e" denotes pb-free and green ? adding an "x" at the end of the ordering code denotes tape and reel packaging 14-0122 packaging mechanical: 52-pin tqfn (zl52) pericom semiconductor corporation ? 1-800-435-2336 pi3w vr12612 hdmi 2.0, displayport 1.2 video switch all trademarks are property of their respective owners. 15-0175

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